The present invention relates to digital computer systems. More particularly, it relates to memory units for such computer systems.
In computer systems, there are numerous uses for random access memories (RAMs). For example, a computer system includes one or more central processor units (CPUs) each of which may include a cache memory. The purpose of a cache memory is to provide for the temporary storage of blocks of data most used by the associated CPU and to provide rapid access to that stored data. One of the measures which establishes limits on the throughput of a CPU is the maximum rate at which data can be stored and retrieved from the cache memory which is made up of high speed Random Access Memory chips. Heretofore, high speed memory systems have been limited by the cycle time of a memory unit in that the smallest memory unit, the RAM chip, could be addressed and accessed but once each clock cycle.